PhD student Mohsen Ghasempour has devised a solution to a problem that has been exercising industry specialists over the last couple of years.

Mohsen’s research (supervised by Dr Mikel Lujan and Dr Jim Garside): “ARMOR: A Run-time Memory hot-row detector to prevent Row-Hammer data corruption in DRAMs” is now the subject of a patent application filed on behalf of the University by UMIP, the University’s commercialisation arm. UMIP is also seeking partners to develop the technology into a full commercial offering.

What is ARMOR?
ARMOR is a hardware-solution to prevent Row Hammer Errors in DRAMs, designed and developed in the School of Computer Science. Row hammering can occur when a specific wordline of a DRAM cell is activated repeatedly within a refresh interval (Row-Aggressor). In this situation the neighboring cells leak charge at a faster rate than expected. Thus, the retention time of such cells becomes less than refresh cycle (e.g. 64 ms) which means that these cells may lose their data (charge) before the refresh happens (Row-Victims). Therefore, during refreshing process the corrupted data will be read and written back again to the DRAM cell. The main challenge to mitigate the Row-Hammer effect is to monitor the number of activations for each row in the DRAM, which imposes a significant storage overhead to the memory system. ARMOR monitors the activation stream at the memory interface level and detects which specific rows (i.e. hot rows) are at risk of being “hammered” at run-time. ARMOR is capable of detecting all the possible hot-rows in a system with a minimal storage overhead.

Why ARMOR is a Promising Solution?
• capable of detecting all the possible Row Hammer errors with a high level of confidence
• provides precise information about the hammered rows (addresses) and the number of activations with a high level of accuracy (e.g. 99.99%)
• it does not need to know about the logical to physical mapping of DRAMs in order to mitigate Row Hammer error (ARMOR Cache Solution)
• scalable according to the size of memory
• technology independent and can easily support future device technologies.

For more information see: http://apt.cs.manchester.ac.uk/projects/ARMOR/RowHammer/index.html